X-Git-Url: https://git.novaco.in/?p=novacoin.git;a=blobdiff_plain;f=src%2Fmain.cpp;h=2cdde5b42b795d833518ed8ee3d0dacab8261cd8;hp=4c8f20c1e4bfd3af8383de926210da05536a763a;hb=b17be7e14b4a62b7935c75fe7e7645e736fd68d2;hpb=84c3fb07b0b8199c7f85c5de280e7100bad0786f diff --git a/src/main.cpp b/src/main.cpp index 4c8f20c..2cdde5b 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -681,8 +681,8 @@ bool CTransaction::AcceptToMemoryPool(CTxDB& txdb, bool fCheckInputs, bool* pfMi if (GetSigOpCount() > nSize / 34 || nSize < 100) return error("AcceptToMemoryPool() : nonstandard transaction"); - // Rather not work on nonstandard transactions - if (!IsStandard()) + // Rather not work on nonstandard transactions (unless -testnet) + if (!fTestNet && !IsStandard()) return error("AcceptToMemoryPool() : nonstandard transaction type"); // Do we already have it? @@ -3145,71 +3145,6 @@ void ThreadBitcoinMiner(void* parg) printf("ThreadBitcoinMiner exiting, %d threads remaining\n", vnThreadsRunning[3]); } -#if defined(__GNUC__) && defined(CRYPTOPP_X86_ASM_AVAILABLE) -void CallCPUID(int in, int& aret, int& cret) -{ - int a, c; - asm ( - "mov %2, %%eax; " // in into eax - "cpuid;" - "mov %%eax, %0;" // eax into a - "mov %%ecx, %1;" // ecx into c - :"=r"(a),"=r"(c) /* output */ - :"r"(in) /* input */ - :"%eax","%ebx","%ecx","%edx" /* clobbered register */ - ); - aret = a; - cret = c; -} - -bool Detect128BitSSE2() -{ - int a, c, nBrand; - CallCPUID(0, a, nBrand); - bool fIntel = (nBrand == 0x6c65746e); // ntel - bool fAMD = (nBrand == 0x444d4163); // cAMD - - struct - { - unsigned int nStepping : 4; - unsigned int nModel : 4; - unsigned int nFamily : 4; - unsigned int nProcessorType : 2; - unsigned int nUnused : 2; - unsigned int nExtendedModel : 4; - unsigned int nExtendedFamily : 8; - } - cpu; - CallCPUID(1, a, c); - memcpy(&cpu, &a, sizeof(cpu)); - int nFamily = cpu.nExtendedFamily + cpu.nFamily; - int nModel = cpu.nExtendedModel*16 + cpu.nModel; - - // We need Intel Nehalem or AMD K10 or better for 128bit SSE2 - // Nehalem = i3/i5/i7 and some Xeon - // K10 = Opterons with 4 or more cores, Phenom, Phenom II, Athlon II - // Intel Core i5 family 6, model 26 or 30 - // Intel Core i7 family 6, model 26 or 30 - // Intel Core i3 family 6, model 37 - // AMD Phenom family 16, model 10 - bool fUseSSE2 = ((fIntel && nFamily * 10000 + nModel >= 60026) || - (fAMD && nFamily * 10000 + nModel >= 160010)); - - // AMD reports a lower model number in 64-bit mode - if (fAMD && sizeof(void*) > 4 && nFamily * 10000 + nModel >= 160000) - fUseSSE2 = true; - - static bool fPrinted; - if (!fPrinted) - { - fPrinted = true; - printf("CPUID %08x family %d, model %d, stepping %d, fUseSSE2=%d\n", nBrand, nFamily, nModel, cpu.nStepping, fUseSSE2); - } - return fUseSSE2; -} -#else -bool Detect128BitSSE2() { return false; } -#endif int FormatHashBlocks(void* pbuffer, unsigned int len) { @@ -3270,9 +3205,6 @@ unsigned int ScanHash_CryptoPP(char* pmidstate, char* pdata, char* phash1, char* } } -extern unsigned int ScanHash_4WaySSE2(char* pmidstate, char* pblock, char* phash1, char* phash, unsigned int& nHashesDone); - - class COrphan { @@ -3546,9 +3478,6 @@ void BitcoinMiner() { printf("BitcoinMiner started\n"); SetThreadPriority(THREAD_PRIORITY_LOWEST); - bool f4WaySSE2 = Detect128BitSSE2(); - if (mapArgs.count("-4way")) - f4WaySSE2 = GetBoolArg("-4way"); // Each thread has its own key and counter CReserveKey reservekey; @@ -3610,14 +3539,9 @@ void BitcoinMiner() unsigned int nHashesDone = 0; unsigned int nNonceFound; -#ifdef FOURWAYSSE2 - if (f4WaySSE2) - // tcatm's 4-way 128-bit SSE2 SHA-256 - nNonceFound = ScanHash_4WaySSE2(pmidstate, pdata + 64, phash1, (char*)&hash, nHashesDone); - else -#endif - // Crypto++ SHA-256 - nNonceFound = ScanHash_CryptoPP(pmidstate, pdata + 64, phash1, (char*)&hash, nHashesDone); + // Crypto++ SHA-256 + nNonceFound = ScanHash_CryptoPP(pmidstate, pdata + 64, phash1, + (char*)&hash, nHashesDone); // Check if something found if (nNonceFound != -1)